Hardware Rough Set Processor Parallel Architecture in FPGA for Finding Core in Big Datasets

Data publikacji: 29 sty 2021

Zakres stron: 99 - 110

Otrzymano: 05 maj 2020

Przyjęty: 05 lis 2020

DOI: https://doi.org/10.2478/jaiscr-2021-0007

Słowa kluczowe

rough sets, FPGA, core attributes, parallel architecture

© 2021 Maciej Kopczyński et al., published by Sciendo

This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.