Hardware Rough Set Processor Parallel Architecture in FPGA for Finding Core in Big Datasets

Pubblicato online: 29 gen 2021

Pagine: 99 - 110

Ricevuto: 05 mag 2020

Accettato: 05 nov 2020

DOI: https://doi.org/10.2478/jaiscr-2021-0007

Parole chiave

rough sets, FPGA, core attributes, parallel architecture

© 2021 Maciej Kopczyński et al., published by Sciendo

This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.