Hardware Rough Set Processor Parallel Architecture in FPGA for Finding Core in Big Datasets

Publié en ligne: 29 janv. 2021

Pages: 99 - 110

Reçu: 05 mai 2020

Accepté: 05 nov. 2020

DOI: https://doi.org/10.2478/jaiscr-2021-0007

Mots clés

rough sets, FPGA, core attributes, parallel architecture

© 2021 Maciej Kopczyński et al., published by Sciendo

This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.