Hardware Rough Set Processor Parallel Architecture in FPGA for Finding Core in Big Datasets
et
29 janv. 2021
À propos de cet article
Publié en ligne: 29 janv. 2021
Pages: 99 - 110
Reçu: 05 mai 2020
Accepté: 05 nov. 2020
DOI: https://doi.org/10.2478/jaiscr-2021-0007
Mots clés
© 2021 Maciej Kopczyński et al., published by Sciendo
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.
This paper presents FPGA and softcore CPU based solution for large datasets parallel core calculation using rough set methods. Architectures shown in this paper have been tested on two real datasets running presented solutions inside FPGA unit. Tested datasets had 1 000 to 10 000 000 objects. The same operations were performed in software implementation. Obtained results show the big acceleration in computation time using hardware supporting core generation in comparison to pure software implementation.