Design Solutions # | Delay (gate delay) | % Optimization | Area (# of gates) | % Optimization |
---|---|---|---|---|
Solution I: using KSA Adder. | 23 | +15% | 6130 | |
Solution II: using Comparator unit. | 27 | 3712 | +50% |
Inputs (bits of M-bit multiplier) | Partial Product | |||
---|---|---|---|---|
|
|
|
|
|
0 | 0 | 0 | 0 | 0 |
0 | 0 | 0 | 1 | A |
0 | 0 | 1 | 0 | A |
0 | 0 | 1 | 1 | 2A |
0 | 1 | 0 | 0 | 2A |
0 | 1 | 0 | 1 | 3A |
0 | 1 | 1 | 0 | 3A |
0 | 1 | 1 | 1 | 4A |
1 | 0 | 0 | 0 | -4A |
1 | 0 | 0 | 1 | -3A |
1 | 0 | 1 | 0 | -3A |
1 | 0 | 1 | 1 | -2A |
1 | 1 | 0 | 0 | -2A |
1 | 1 | 0 | 1 | -A |
1 | 1 | 1 | 0 | -A |
1 | 1 | 1 | 1 | 0 |