Radix-8 Design Alternatives of Fast Two Operands Interleaved Multiplication with Enhanced Architecture

Data publikacji: 08 paź 2019

Zakres stron: 15 - 27

DOI: https://doi.org/10.21307/ijanmc-2019-043

Słowa kluczowe

Cryptography, Computer Arithmetic, FPGA Design, Hardware Synthesis, Kogge-Stone Adder (KSA), Radix-8 Booth Recording, Karatsuba Multiplier, Wallace Tree

© 2019 Mohammad M. Asad et al., published by Sciendo

This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.