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Journals
International Journal of Applied Mathematics and Computer Science
Volume 20 (2010): Issue 3 (September 2010)
Open Access
Loop profiling tool for HPC code inspection as an efficient method of FPGA based acceleration
Marcin Pietroń
Marcin Pietroń
,
Paweł Russek
Paweł Russek
and
Kazimierz Wiatr
Kazimierz Wiatr
| Sep 27, 2010
International Journal of Applied Mathematics and Computer Science
Volume 20 (2010): Issue 3 (September 2010)
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Published Online:
Sep 27, 2010
Page range:
581 - 589
DOI:
https://doi.org/10.2478/v10006-010-0043-1
Keywords
HPC
,
HPRC (High Performance Reconfigurable Computing)
,
loop profiling
,
Mitrion-C
,
DFG (Data Flow Graph)
This content is open access.
Marcin Pietroń
Department of Electrical Engineering and Computer Science, AGH University of Science and Technology, al. Mickiewicza 30, 30-059 Cracow, Poland
Paweł Russek
Kazimierz Wiatr