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Implementation of 144 × 64 Pixel Array Bezel-Less Cmos Fingerprint Sensor

Seungmin Jung

Seungmin Jung

School of Information and Technology, Hanshin UniversityOsan-si, Korea
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Jung, Seungmin
  
Sep 03, 2018
Implementation of 144 × 64 Pixel Array Bezel-Less Cmos Fingerprint Sensor's Cover Image
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Article Category: Research-Article
Published Online: Sep 03, 2018
Page range: 1 - 5
DOI: https://doi.org/10.21307/ijssis-2018-013
Keywords
© 2018 Seungmin Jung et al., published by Sciendo
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.

Fig. 1

Pixel-level sensor scheme and output voltage.
Pixel-level sensor scheme and output voltage.

Fig. 2

Functional block diagram of fingerprint sensor chip.
Functional block diagram of fingerprint sensor chip.

Fig. 3

Pipelined scan fingerprint sensor driver architecture.
Pipelined scan fingerprint sensor driver architecture.

Fig. 4

Floorplan of fingerprint sensor chip.
Floorplan of fingerprint sensor chip.

Fig. 5

RTL simulation result of pipelined architecture.
RTL simulation result of pipelined architecture.

Fig. 6

144 × 64 pixel array chip layout (7,569 μm × 4,569 μm @0.35 μm CMOS process)
144 × 64 pixel array chip layout (7,569 μm × 4,569 μm @0.35 μm CMOS process)
Language:
English
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1 times per year
Journal Subjects:
Engineering, Introductions and Overviews, Engineering, other
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