A triple path noise cancellation LNA with transformer output using 45 nm CMOS technology
Published Online: Nov 15, 2022
Page range: 337 - 342
Received: Sep 10, 2022
DOI: https://doi.org/10.2478/jee-2022-0045
Keywords
© 2022 Dheeraj Kalra et al., published by Sciendo
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.
A triple path dual resistive feedback noise cancellation (TP-DRNC) low noise amplifier (LNA) with transformer output presented which provides high gain, low noise figure (NF), and high figure of merit (FM). The analysis of triple path, dual resistive, gain, and NF have been discussed. The effect of various components used in the circuit have been analyzed and their optimized values are obtained which resulted in the high (FM). The combination of dual resistive feedback with triple path NC transformer output allowed for low NF and high gain. The proposed GPDK 45 nm complementary metal oxide semiconductor (CMOS) technology-based LNA offers a flat gain curve of 10.81 dB over the range of 1.6 GHz to 4.3 GHz, or 2.7 GHz bandwidth, and S11 less than −9 dB. The input third order intercept point (IIP3) for the given bandwidth has value of 5.7 dBm, while the minimal NF achieved is 2.7 dB; (FM1) is 14.026 and (FM2) is 12.48. The proposed LNA’s layout with an o -chip transformer has an area of 0.01985 mm2