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Development of main functional modules for MVB and its application in rail transit

Data publikacji: 29 Apr 2022
Tom & Zeszyt: AHEAD OF PRINT
Zakres stron: -
Otrzymano: 17 Aug 2021
Przyjęty: 14 Nov 2021
Informacje o czasopiśmie
License
Format
Czasopismo
eISSN
2444-8656
Pierwsze wydanie
01 Jan 2016
Częstotliwość wydawania
2 razy w roku
Języki
Angielski
Abstract

In this work, multi-function vehicle bus (MVB) controller-based Field Programmable Gate Array (FPGA) and MVB manager based on the real-time multitasking operating system were explored and developed. The function of the MVB controller data link layer was realised by using FPGA. The embedded real-time multitasking operating system uCOS-II was applied to the development of MVB manager’s processing data, device state management, message data and bus management function. The network consistency test was performed to validate data communication of MVB link layer control protocol and the management function of MVB manager; the equipment was shown to be compatible with each other and met the requirements of IEC61375-1.

Keywords

Introduction

With the opening of Beijing Tianjin inter-city high-speed railway, and other high-speed passenger dedicated lines such as Shijiazhuang-Taiyuan, Wuhan-Guangzhou, Zhengzhou-Xi’an, Beijing-Shanghai and Guangzhou-Shenzhen-Hongkong, high-speed railway [1,2,3,4,5] is developing rapidly. For metro, Beijing, Shanghai, Guangzhou, Shenzhen, Nanjing, Chengdu and other cities have been operating in succession, China has made great progress in high-speed railway and urban rail transit [6,7,8,9,10,11] in recent years. At the same time, the State Council of China discussed and passed the ‘12th Five-Year’ comprehensive transportation system plan on 21 March 2012. The conference confirmed that the national rapid railway network will be completed during the ‘12th Five-Year’ period, and the railway transport service basically would cover the bulk cargo distribution and cities with a population above 200,000.

As a train neural network system, the train communication network (TCN) is widely applied. Many countries in the world have been working on fundamental research and product application of TCN [12,13,14,15] for a long time, and have successfully developed their own TCN systems. For example, Shinkansen ARCNET train network control system was applied in Japan, TGV series high-speed train WordFIP train network control system in France. To achieve the international standardisation of train data communication, the IEC (i.e. International Electrotechnical Commission) adopted a special standard for TCN (IEC61375-1) in 1999. As the standard was specially designed for the TCN, it has a certain advantage over other field buses in the aspects of real-time, reliability, addressing mode, media access control method and communication service formulation. As its core technology was jointly developed by international companies such as SIEMENS and ABB, it was able to establish the required standard in the actual project. It has been supported thereby and developed by many railway operation companies and equipment suppliers.

At present, there are many successful applications of TCN all over the world, such as the Florence subway train in Italy, Manila subway train in the Philippines, and Bulgaria railway in Bulgaria, all using the TCN. Meanwhile, the research and development of the related products of the TCN and vehicle equipment in China also progressed and strengthened from the new century. For example, the ‘North Asia’ internal combustion unit with its own power, the ‘Xianfeng’ EMU was developed by the vehicle factory in Nanjing, the dynamic dispersion of ‘Zhongyuan Star’ between Wuchang and Zhengzhou, and CRH5 EMU was produced by CNR Changchun Co., Ltd, and so on. However, due to the late start and other reasons, there is a certain gap in fundamental research and product application compared with international giants.

With the wide application of fieldbus technology and embedded control system technology in EMU, the control system of EMU has developed from a traditional centralised control system to a modern distributed control system. The distributed control system aims to realise local resource sharing, team cooperation, decentralised monitoring and common control. In the structure level of the multi-function vehicle bus (MVB) bus protocol [16,17,18,19], the MVB controller accepts data from the bus data from the physical layer and sends the data from the high-level application, and completes the reading and receiving of the bus data, the encapsulation and unwrapping of the data and so on. At the same time, it provides process data and message data interfaces for the network layer, including the physical layer and data link layer. The physical layer mainly completes the definition of media, the topology of the physical layer and the interface of the transceiver. The data link layer completes redundancy processing, frame and message coding, timing and synchronisation, and link-control frame format and content. With the more and more extensive application of MVB in civil EMU trains, the key core technology of MVB is monopolised by international giants. The research on MVB bus technology is of great significance to the development of EMU train communication products and TCN with independent intellectual property rights.

MVB bus analysis and overall development
Overview of TCN

According to the IEC61375-1 standard, the TCN [16,17,18,19] could be divided into two layers of bus structure on the network topology: Wire train bus (WTB) and MVB. WTB could mainly complete data communication between trains, and MVB could mainly complete data communication between vehicle functional devices. The two-level buses are relatively independent communication subnets, which could exchange data through the WTB-MVB gateway. The topological structure of TCN is shown in Figure 1.

Fig. 1

TCN network topological diagram. MVB, multi-function vehicle bus; TCN, train communication network, WTB, wire train bus

MVB bus could define different levels of devices according to the functions to be completed. In different levels of equipment, their hardware circuits may be exactly the same. By using different software modules, different functional devices could be realised. MVB standard defines six types of equipment based on the characteristics of the rail vehicles, as shown in Table 1.

The six functional components within MVB

Equipment level Equipment function

0 It includes repeater, star coupling and bus coupler, belonging to physical layer equipment
1 Device status and process data function
2 Device status function, process data function and message data function
3 Device status function, process data function, message data function and user programmable function
4 Device status function, process data function, message data function and bus management function
5 Device status function, process data function, message data function and TCN gateway function

MVB, multi-function vehicle bus, TCN, train communication network

MVB bus is a fieldbus that could specialise in data exchange of internal functional equipment under the condition of the vehicle environment. MVB bus adopts bus topology. There is a unique bus master device management bus in the bus. Other devices on the bus are used as slave devices to send and receive data under the management of the master device. The mode of bus communication can be that the master device sends the master frame and the slave device replies from the frame. In MVB data communication, the typical features are as follows: communication transmission mode adopts master and slave response, frame transmission mode adopts periodic broadcasting, frame identifier has frame head and frame tail identification recognition frame start and end, frame coding adopts Manchester coding, and data transmission rate is 1.5 Mbit/s.

Real-time protocol provides communication between application devices in vehicles or between vehicles, as shown in Figure 2. In MVB data communication, the message consists of the master frame and the slave frame of the reply master frame. The timing of the message on the bus is shown in Figure 3.

Fig. 2

MVB real-time communication protocol. MVB, multi-function vehicle bus

Fig. 3

The timing of the message on the MVB bus. MVB, multi-function vehicle bus

The transmission time of the message on the bus could be determined by the time of main frame and slave frame transmission. The length of the main frame could be fixed, so the transmission time could be defined. From the length of the frame to 33-297 bits, the time required for the MVB bus message to complete the data transmission could be established in Formula 1.

t_mm=t_m+t_s+t_sm=len(M_frame)/V+len(S_frame)/V+t_ms+t_sm t\_mm = t\_m + t\_s + t\_sm = len\left( {M\_frame} \right)/V + len\left( {S\_frame} \right)/V + t\_ms + t\_sm

Among them: V is the data communication rate of MVB bus, len () is the length of the data frame (in bits), M_frame is the main frame length, S_frame is the slave frame length, t_ms is the main frame to respond to the time interval between frames from the main frame, t_sm is the time interval from frame to next main frame.

Principles of MVB communications

As a specific fieldbus, the communication scheduling of information can be regarded as the task scheduling problem in a real-time system to some extent. Assuming that there are N devices on the network bus and the number of periodic information participating in communication is Np, each MVB periodic information [16, 17] corresponds to a process data logic port. In this way, the model of each periodic data could be described as Mpi=(Cpi,Dpi,Tpi),i=1,,Np M_p^i = \left( {C_p^i,D_p^i,T_p^i} \right),\,\,\,\,\,i = 1, \ldots ,{N_p} Cpi,Dpi,Tpi C_p^i,D_p^i,T_p^i represent the execution time, deadline and arrival period of cycle information, respectively.

For aperiodic information, to simplify the analysis, it is assumed that all aperiodic information has a minimum arrival time interval, and no new information will appear before each information is processed. If Na aperiodic messages participate in communication on the MVB bus, the model of each aperiodic message can be described as Mai=(Cai,Dai,Tai),i=1,,Na M_a^i = \left( {C_a^i,D_a^i,T_a^i} \right),\,\,\,\,\,i = 1, \ldots ,{N_a} represent the execution time, deadline and minimum arrival interval of aperiodic information, respectively. Since the transmission of aperiodic information is related to specific equipment sites, if there is Na aperiodic information on any kth equipment, the jth aperiodic information on the equipment can be expressed as Makj=(Cakj,Dakj,Takj),k[1,N],k[1,Nak],andk=1NNak=Na M_a^{kj} = \left( {C_a^{kj},D_a^{kj},T_a^{kj}} \right),\,\,\,\,\,k \in \left[ {1,N} \right]\,,\,\,\,\,k \in \left[ {1,N_a^k} \right],\,\,\,\,\,{\rm{and}}\,\,\,\,\,\sum\limits_{k = 1}^N {N_a^k = {N_a}}

For MVB networks with Np cycle information, generally, Dpi=Tpi D_p^i = T_p^i for any cycle information, then the MVB cycle information model can be described as Mpi*=(Cpi,Tpi),i=1,,Np M_p^{i*} = \left( {C_p^i,T_p^i} \right),\,\,i = 1, \ldots ,{N_p} . The micro period of all period information could be expressed as Tbp=HCFi=1Np(Tpi)=max{Ω|TpiΩ=TpiΩ},andi[1,Np],Ωandiarepositiveintegers {T_{bp}} = HCF\,i = 1 \ldots {N_p}\left( {T_p^i} \right) = \max \left\{ {\Omega \left| {{{T_p^i} \over \Omega } = \left\lfloor {{{T_p^i} \over \Omega }} \right\rfloor } \right.} \right\},\,{\rm{and}}\,\forall i \in \left[ {1,{N_p}} \right],\,\Omega \,{\rm{and}}\,i\,{\rm{are}}\,{\rm{positive}}\,{\rm{integers}} The macro cycle of MVB cycle information is TMp=LCMi=1Np=min{ϕ|ϕTpi=ϕTpi},andi[1,Np],ϕandiarepositiveintegers {T_{Mp}} = \mathop {LCM}\limits_{i = 1 \ldots {N_p}} = \min \left\{ {\phi \left| {{\phi \over {T_p^i}} = \left\lfloor {{\phi \over {T_p^i}}} \right\rfloor } \right.} \right\},\,{\rm{and}}\,\forall i \in \left[ {1,{N_p}} \right],\,\phi \,{\rm{and}}\,i\,{\rm{are}}\,{\rm{positive}}\,{\rm{integers}}

In the above formula, ⎣X⎦ means to take the maximum integer not greater than X, and the micro period of the period information determined in method HCF/LCM is the basic period corresponding to the actual MVB.

Assuming that the periodic information is independent of each other and at a critical time, each information may wait for the Worst-Case Response Time. If the synchronisation algorithm was used to schedule the periodic information, the necessary and sufficient conditions for the validity of the scheduling table are as follows: TRiwcDpi=Tpi T_{Ri}^{wc} \le D_p^i = T_p^i

TRiwc T_{Ri}^{wc} represent the Worst-Case Response Time of cycle information, Mpi* M_p^{i*} , of MVB at the critical time.

Suppose Smp=TMpTbp {S_{mp}} = {{{T_{Mp}}} \over {{T_{bp}}}} was the number of micro cycles contained in each macro cycle, considering that when the critical moment information Mpi* M_p^{i*} is scheduled, there may be high priority information blocking Mpi* M_p^{i*} . For each macro cycle, if Mpi* M_p^{i*} was scheduled in the nth micro cycle and n = 1, . . . , Nmp is the sequence number of each micro cycle in each macro cycle, the response time of information transmission and processing is as follow: TRi(n)=[(n1)ModTpi]Tbp+Thi,n+Cpi {T_{Ri}}\left( n \right) = \left[ {\left( {n - 1} \right)ModT_p^i} \right] \cdot {T_{bp}} + {T_{hi,n}} + C_p^i

Thi,n represent the transmission processing time of all other information, hi(n), with a priority higher than information, Mpi* M_p^{i*} , in the nth micro cycles. Its size is as follow: Thi,n=jh(i)Cpj {T_{hi,n}} = \sum\limits_{j \in h\left( i \right)} {C_p^j}

Thus, there is: TRi(n)=[(n1)ModTpi]Tbp+jh(i)Cpj+Cpihi(n) {T_{Ri}}\left( n \right) = \left[ {\left( {n - 1} \right)ModT_p^i} \right] \cdot {T_{bp}} + \sum\limits_{j \in h\left( i \right)} {C_p^j + C_p^i{h_i}\left( n \right)}

Then, in a macro cycle, the Worst-Case Response Time of cycle information, Mpi* M_p^{i*} , is as follow: TRiwc=maxn{1,,Nmp}{TRi(n)} T_{Ri}^{wc} = \mathop {\max }\limits_{n \in \left\{ {1, \ldots ,{N_{mp}}} \right\}} \,\,\left\{ {{T_{Ri}}\left( n \right)} \right\}

According to equations 8–11, the necessary and sufficient condition for judging whether the synchronisation algorithm is schedulable could be expressed as follows:

TRiwc=maxn{1,,Nmp}{TRi(n)}Tpi T_{Ri}^{wc} = \mathop {\max }\limits_{n \in \left\{ {1, \ldots ,{N_{mp}}} \right\}} \,\,\left\{ {{T_{Ri}}\left( n \right)} \right\} \le T_p^i
Analysis of main function modules of MVB bus

MVB physical layer is the physical carrier of the data transmission by MVB bus. The ESD segment includes a bus manager, slave devices controlled by this bus manager, and a WTB-MVB gateway communicating with WTB. The EMD segment includes a bus manager, slave devices and repeater. The OFG section also has several other devices. The bus is connected by the repeater, and each line segment uses redundant lines, and the data is transmitted through a repeater.

The link-layer control protocol includes the encoding of device address and logic address, and the coding of frame type. The device is identified from the 12 bits device address of the master frame received from the bus. If the address is consistent with the device address, the corresponding slave frame could be sent according to the F_code function code requirements. The logical address is 12 bits, indicating the source of process data. The frame data includes the main frame and the slave frame, and the main frame should contain a fixed 16 data word. The first bit of the data word sent is its highest valid bit, expressed in bit 0.

The encoding and decoding of MVB frame [16, 17] could use the man Chester code. For single data bits, ‘1’ and ‘0’, the man Chester code has the following rules, as shown in Figure 4:

A ‘1’ encoding should be HIGH in the first half of bits and LOW in the latter half.

A ‘0’ encoding in the first half of bits should be LOW and the latter part is HIGH.

Fig. 4

Data encoding of ‘1’ and ‘0’

MVB also defines non-dataset rules, including NH and NL, which are encoded in the bit according to the following rules.

The encoding of a ‘NH’ is HIGH in the whole bit cell.

A ‘NL’ is encoded in the whole bit unit of LOW.

MVB bus adopts the master-slave mode to complete the control of bus data communication. The only master device on the bus controls and manages its media distribution. Multiple standby devices on a bus can become the bus master. The bus master is the only device that can send the master frame. All other devices are slave devices, which complete the data transmission under the control of the master device. At the end of the cycle, the current master device transfers the control right to the next master device. During the cycle time, the current master device maintains control of the bus. If there is no next master device, the current master device continues to execute the control by itself. The start of each round is detected by the attached device, which is used to monitor which device is the current master device on the bus for synchronisation.

The overall development scheme of MVB bus

MVB bus is a real-time field bus [16,17,18,19], based on full consideration of the real-time and reliability of data communication, the overall development scheme of the MVB bus is shown in Figure 5. MVB bus is mainly implemented in three parts: the physical layer, the data link layer and the real-time protocol layer [20,21,22,23,24]. In the physical layer, the definition of medium, the topology of the physical layer, and the interface of the transceiver, could be finalised. Data link layer could complete redundancy processing, frame and message encoding, timing and synchronisation, link control frame format and content. The real-time protocol could complete the process of sending and receiving data and message data, media distribution and sovereignty transfer.

Fig. 5

MVB bus overall development scheme. MVB, multi-function vehicle bus

MVB bus controller uses the ProASIC3 series A3P060 chip of ACTEL, which has a major breakthrough in price, performance and gate density, and provides the function of the supply. As MVB’s data link layer chip, A3P060 has the gate size of the 60 K system, up to 71 I/O ports, the static RAM with 18Kbit, and the frequency of providing the highest output 350 MHz. From this end, A3P060 meets its design requirements. As A3P060 has 18Kbit SRAM inside, and in MVB bus general scheme development, 4Kbit is required for shared RAM, so the shared RAM adopts the internal SRAM of the A3P060 chip to save cost.

The application microprocessor uses STC12LE5A60S2, which is a single clock machine cycle (1T) single-chip generated by the macrocrystal technology company. The instruction code is completely compatible with the traditional 8051, but the speed is faster than 8~12 times. Meanwhile, the working frequency is 12 MHz, while the user application space is 60 K, which satisfies the uCOS-II requirement of embedded real-time operating system code space. There are four timers integrated inside, which can also satisfy the requirements of the MVB bus manager’s real-time data transmission, that is, 1 ms transmits one cycle of data.

MVB bus manager software includes an embedded real-time operation system, MVB communication protocol and specific application programmes. Based on the MVB data link layer and the support of a real-time operating system, the MVB protocol could complete the communication task of the MVB data link layer through the MVB driver. The application software access MVB protocol through the application interface function provided by MVB protocol.

The development of MVB controller
Hardware development of MVB controller

A3P060 comes from ACTEL’s ProASIC3/E series, which has made significant breakthroughs in terms of price, performance and gate density, and provides all kinds of functions that are needed. The A3P060 chip has a 60 K system gate scale, twice as many resources as A3P030. It has 18Kbit SRAM and 1Kbit on-chip programmable non-volatile FlashROM, which can be used for information storage. It has 128bit FlashLock and AES encryption technology. And it can output up to 350 MHz frequency with 1 PLL.

The peripheral circuit development of A3P060 mainly includes power, clock, JTAG and some additional circuits. As the A3P060 chip needs a 3.3 V and 1.5 V power supply, AMS1117-3.3 V and AMS117-1.5 V voltage regulator chips could be used in the development of the circuit. According to the data handbook of the AMS1117 chip, the circuit development is shown in Figure 6.

Fig. 6

The circuit development of the A3P060 power supply

The STC12 chip series comes from mainland China’s macro intellectual company with independent intellectual property rights. It can directly replace the 89 series single chip, with super anti-interference capability, ultra-low power consumption and in-system programmable mode. The peripheral circuit development of the STC12LE5A60S2 chipt mainly includes power supply, clock and additional circuit. The STC12LE5A60S2 chip uses 3.3 V voltage, and the clock uses a 12 MHz passive crystal oscillator and Field Programmable Gate Array (FPGA) communication.

According to the specification, the electrical short-distance medium is allowed to support up to 32 devices, and the transmission distance can reach 20 m without electrical isolation. At the same time, considering that the power supply of the whole system is 3.3 V, the interface chip adopts ISL43485 and the redundant RS485 transmission line is adopted in the MVB physical layer.

MVB board was designed as per PC/104 bus standard, and Altium Designer 6 drawing software was applied to complete the schematic development of the hardware circuit diagram. The PC/104 bus provides an MVB board with a backplane bus or communication channel of other modules. According to the backplane bus configuration mode, its slot may include a CPU module, MVB communication module or other interface cards. The application of a microprocessor, together with the surrounding memory and other modules, jointly realises the transmission of data information in the MVB board. The data in the MVB board comes from the memory on the board. Both the MVB controller and MVB manager can access the local memory.

Development of state machine for MVB controller

In the development of the MVB state machine, to decompose the whole complex control logic into a finite stable state, the event could be judged in each state, and the Moore state machine was used. The state could be decomposed into:

WAIT state S0. The initial state of the system is also the final state of the system.

Receiving the bus data state S1. When the system is in WAIT state, and when there is a bus data request, it would enter the S2 state and receive redundant bus data.

The decoding of the frame and the CRC checking S2. When the receiving bus data is completed, it would enter the state, decode the frame and check the CRC. If the decoding was an error and the CRC checking was incorrect, the standby data would be decoded and CRC be checked. If still error, it would enter the S0 state, enter the write RAM state S4 according to the data field in the frame, and send the data to the network layer S5, and read the RAM state S6.

Write the shared RAM state S3. This state is to receive the bus data to the port, that is, to enter the S4 state.

The data is sent to the network layer state S4. According to the received bus data, if the slave frame is sent, the data is sent to the bus and then enters the WAIT state S0.

Read the shared RAM state S5. If the device receives the address of the main frame data for the slave device, reads the source port data and enters the frame encoding state.

Receive the network layer data state S6. When a network layer interface has data requests, it enters the state and reads data.

Frame coding state S7. When data is sent to the bus, the frame coding state is first completed, and then the data transmission state is entered.

Send data to the bus state S8. After the frame coding and CRC coding are completed, send data to the MVB redundant bus according to the Manchester code, and then enter the S0 state.

According to the above state, a state transition diagram of the MVB controller finite state machine is shown in Figure 7.

Fig. 7

Development of the finite state machine for MVB controller. MVB, multi-function vehicle bus

The development of MVB manager

The MVB manager could be divided into four modules according to the functional level: the MVB bus initialisation module, the process data communication module, the monitoring data communication module and the link-layer control module. The system consists of four tasks: initialisation task, timer task, link layer control task, and process data application task and bus management function. Figure 8 gives the design structure of MVB management and gives a brief introduction to each task.

Fig. 8

The software structure of the MVB bus manager. MVB, multi-function vehicle bus

The link-layer interface defines the process data, message data and other services provided to the bus by the upper layer protocol, which mainly includes initialisation of variables related to the link-layer interface and data reading and writing, and interface function as shown in Table 2.

Link-layer interface function for MVB manager

Function name Meaning Parameter Return value

Int OSLinkInit(void) Initialisation of variables associated with the link layer Nothing Nothing
Int OSLinkWr(int PortID, int *WrData) Write application layer data to the link layer The data to be written and the corresponding port number Write correctly return 0, error is not 0
Int OSLinkRd(int PortID, int *RdData) Read link layer data Reading data on a specific port Reading correctly return 0, error is not 0

MVB, multi-function vehicle bus

The basic cycle of the development is 1 ms, and the process data is transmitted to 650 µs, and the clock beat of the system of uCOS-II is 0.02 s, so the OStimeDly, OSTimeDlyHMSM and OSTimeTickHook functions cannot be used, and the independent timer interruption could be used. For STC12LE5A60S2 chips, there are four 16bit timers, two timers or counters compatible with traditional 8051, 16bit timer T0 and T1. T0 timer is used for system beat function, and T1 timer is used to debug the baud rate generator of the serial port. Thus, in the interrupt service function used for process data transmission timing, a programmable calculation array soft timer could be adopted. The structure of its task function is shown in Figure 9.

Fig. 9

Flow-process diagram of process data interrupt service function

Since the transmission of the periodic and occasional phase data are in microseconds, the real-time conversion between them is very high. According to the previous analysis, the timing interrupt mode of the independent operating system could be used to complete the periodic and accidental phase switching. In programme development, the current state is indicated by setting a global variable EVEN_STATE, and the timing of the timer is set at the next time according to the phase. The current state is a periodic phase, and when the timer breaks into the interrupt service programme, the cycle phase is performed, and the EVEN_STATE will be set to 1, and the next timeout time of the timer is set to 300 µs. If the current state is an occasional phase, it also enters the interrupt service programme, performs the occasional phase function, changes the value of the EVEN_STATE, and sets the timeout time for the timer to be 650 µs. This cycle is repeated and the control of the periodic and accidental phases in the basic cycle is completed.

In the periodic phase, the MVB manager provides two ways of automatic sending and manual sending. The automatic sending sets up a master frame table for the manager beforehand, so the bus manager can automatically send the main frame sequence in the main frame table. The sending process is automatically carried out by the main device, without the user’s participation, and the main frame table can add or modify the address or function code in the main frame. Since process data are periodic data, the automatic transmission is more suitable. In the incidental phase, in the contingency, especially in event arbitration, the transmission of the main frame needs to be determined from the frame data of the response of the previous main frame. It is often used to send frame data according to the need, that is, event triggering.

During initialisation, each MVB manager establishes an information list of all managers on the bus, called the MVB manager information table, which is sorted by token transmission. In a basic cycle at the end of the macrocycle, the master equipment shall send a master frame with a function code of 15 and equipment status request function to check the status of the equipment in the list, i.e. the proposed master equipment. The master frame address is the address of the redundant master equipment, i.e. the device address in the MVB manager information table. When the standby master device receives the master frame about sovereignty transfer, first check whether its state is active and correctly configured. The standby device responds to the slave frame, which is the state of the device. If the device is normal and configured correctly, the master device sends the master frame with function code 08 to the standby device. The standby master responds to the master frame by sending the sovereignty transfer response frame. The sovereignty transfer protocol is completed and then the next cycle is started. If the proposed master device is not active or configured incorrectly, sovereignty transfer will not occur. The current master device continues to perform the function of bus master until the end of the next cycle. The sovereignty transfer process is shown in Figure 10.

Fig. 10

Flow-process diagram of the sovereignty transfer process

The test for MVB

The Printed Circuit Board (PCB) card, of the MVB controller was implemented by Altium Designer 6.0 software. The development process of PCB mainly includes net input list, rule setting, component layout, wiring, review, output and other steps. Then the drawings were sent to the PCB processing plant to complete the production of PCB. Finally, the welding and debugging of electronic devices could be completed.

When using EDA tools for digital development, first of all, the functional requirements of system development concepts and original development specifications should be transformed into format files that can be recognised by subsequent development tools, such as synthesis tools, simulation tools and layout and wiring tools. The developed function definition shall first be converted into standard circuit diagram form and standard language description form. Then the conversion from language level to gate level circuit was completed. After the synthesis was completed, there was no error. Then, layout and wiring were carried out, and the programme file was downloaded, as shown in Figure 11. Actel FPGA development environment libero needs multiple software support and requires different software to complete corresponding functions in each stage. The simulation is called ModeSim, the synthesis is called Synplify, the layout and wiring is called Designer, the download is called the FlashPro tool and so on.

Fig. 11

Flow-process diagram of FPGA development. FPGA, Field Programmable Gate Array

In the MVB conformance test, the MVB communication network is composed of two MVB class II devices and two MVB class IV devices, which use redundant electrical short-distance media communication with each other. The nodes in the MVB network were used as test nodes, and each MVB node ran its own test application. At the same time, the test command was sent to the node through the upper computer, and the test equipment displayed its status to the LED on the board through the RS485 data line. The PC judged whether the equipment complies with the MVB conformance test specification IEC61375-2 based on the conformance test standard.

Based on completing the configuration of relevant parameters of MVB test equipment, according to the description of MVB process data link layer protocol and specific test requirements, as well as the requirements of IEC61375-2 standard, the following tests in Table 3 were selected. In the MVB test application, the received frame data were compared with the predetermined frame data and, and if correct, were displayed on the LED on the card. At the same time, the response delay, the inter-frame interval in the source device and the inter-frame interval of the target device were also tested. The test results showed that the system equipment index was satisfied by the requirements.

Process data test of MVB by IEC61375-2 standard

Test items Test content Expected results

MVB_1 Process data basic communication function 1 The process data read request of the main device is sent to read the slave device port data after the device receives the master frame.
MVB_2 Process data basic communication function 2 The main device sends out the correct process data read request from the device and responds to the main frame from the device according to the source port data.
MVB_3 Data length test The main device sends out the function code from the frame of different frame length F_code and responds to the main frame from the frame according to the request.
MVB_4 Communication buffer source port data coercion test The main device sends a request that causes the device source process data to be invalid, and the device under test responds to the request in response to the data ‘0’.
MVB_5 Communication buffer port The logical address identification device sends out the process data request to the unconfigured source port, and the tested device cannot respond to the request.

MVB, multi-function vehicle bus

Table 4 presented the executable test items of the MVB manager based on IEC61375-2. According to the test equipment configuration and test requirements, all test examples in Table 4 were completed in the laboratory environment. During the test, the MVB manager runs the MVB test application and tests the MVB functions one by one according to the test cases. The test results were compared with the preset results and were displayed on the LED within the card. After testing the function of the MVB manager, the MVB host correctly sent the main frame and successfully completed the exclusive transmission function. The transmission and transmission requirements of the MVB main equipment mainframe in the IEC61375-1 standard were realised.

The test for MVB bus management performance

Test item Test content Expected results

MVB_6 MVB master frame transmission The test device sends the main frame in the order of the main frame table
MVB_7 Transfer of sovereignty Select four types of equipment list for sovereignty transfer
MVB-8 Sovereign reception Receiving sovereignty of standby main equipment

MVB, multi-function vehicle bus

Through the process data communication test of the MVB controller and the management function test of the MVB manager, it showed that MVB devices communicated well with each other, and the process data transmission and bus management functions comply with IEC61375-1 standard.

Conclusions

TCN is a data communication network system based on the distributed control system and train control and information diagnosis. The system could be divided into Wired Train Bus and multi-functional vehicle bus. WTB can be used to connect vehicles of the dynamic planning group, and MVB can be used to connect fixed equipment in vehicles. In this work, based on the analysis of the functional and development requirements of the MVB controller, the function of the MVB bus controller data link layer was realised by using programmable gate array FPGA. At the same time, the hardware circuit development of the MVB bus communication board was completed based on the PC104 standard. According to the requirements of the IEC61375-1 standard for MVB class IV equipment bus management and real-time data transmission, the embedded real-time multitasking operating system was adopted. The state performance, process data performance, message data performance and bus management performance of four MVB devices were realised. At the same time, the MVB bus communication network was built, and the network consistency test of the MVB bus was carried out according to the IEC61375-2 standard, which mainly includes the MVB link control protocol test and MVB administrator management function communication ability behaviour test. The test results showed that it met the requirements of the IEC61375-1 standard for MVB.

Fig. 1

TCN network topological diagram. MVB, multi-function vehicle bus; TCN, train communication network, WTB, wire train bus
TCN network topological diagram. MVB, multi-function vehicle bus; TCN, train communication network, WTB, wire train bus

Fig. 2

MVB real-time communication protocol. MVB, multi-function vehicle bus
MVB real-time communication protocol. MVB, multi-function vehicle bus

Fig. 3

The timing of the message on the MVB bus. MVB, multi-function vehicle bus
The timing of the message on the MVB bus. MVB, multi-function vehicle bus

Fig. 4

Data encoding of ‘1’ and ‘0’
Data encoding of ‘1’ and ‘0’

Fig. 5

MVB bus overall development scheme. MVB, multi-function vehicle bus
MVB bus overall development scheme. MVB, multi-function vehicle bus

Fig. 6

The circuit development of the A3P060 power supply
The circuit development of the A3P060 power supply

Fig. 7

Development of the finite state machine for MVB controller. MVB, multi-function vehicle bus
Development of the finite state machine for MVB controller. MVB, multi-function vehicle bus

Fig. 8

The software structure of the MVB bus manager. MVB, multi-function vehicle bus
The software structure of the MVB bus manager. MVB, multi-function vehicle bus

Fig. 9

Flow-process diagram of process data interrupt service function
Flow-process diagram of process data interrupt service function

Fig. 10

Flow-process diagram of the sovereignty transfer process
Flow-process diagram of the sovereignty transfer process

Fig. 11

Flow-process diagram of FPGA development. FPGA, Field Programmable Gate Array
Flow-process diagram of FPGA development. FPGA, Field Programmable Gate Array

Process data test of MVB by IEC61375-2 standard

Test items Test content Expected results

MVB_1 Process data basic communication function 1 The process data read request of the main device is sent to read the slave device port data after the device receives the master frame.
MVB_2 Process data basic communication function 2 The main device sends out the correct process data read request from the device and responds to the main frame from the device according to the source port data.
MVB_3 Data length test The main device sends out the function code from the frame of different frame length F_code and responds to the main frame from the frame according to the request.
MVB_4 Communication buffer source port data coercion test The main device sends a request that causes the device source process data to be invalid, and the device under test responds to the request in response to the data ‘0’.
MVB_5 Communication buffer port The logical address identification device sends out the process data request to the unconfigured source port, and the tested device cannot respond to the request.

The test for MVB bus management performance

Test item Test content Expected results

MVB_6 MVB master frame transmission The test device sends the main frame in the order of the main frame table
MVB_7 Transfer of sovereignty Select four types of equipment list for sovereignty transfer
MVB-8 Sovereign reception Receiving sovereignty of standby main equipment

The six functional components within MVB

Equipment level Equipment function

0 It includes repeater, star coupling and bus coupler, belonging to physical layer equipment
1 Device status and process data function
2 Device status function, process data function and message data function
3 Device status function, process data function, message data function and user programmable function
4 Device status function, process data function, message data function and bus management function
5 Device status function, process data function, message data function and TCN gateway function

Link-layer interface function for MVB manager

Function name Meaning Parameter Return value

Int OSLinkInit(void) Initialisation of variables associated with the link layer Nothing Nothing
Int OSLinkWr(int PortID, int *WrData) Write application layer data to the link layer The data to be written and the corresponding port number Write correctly return 0, error is not 0
Int OSLinkRd(int PortID, int *RdData) Read link layer data Reading data on a specific port Reading correctly return 0, error is not 0

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