<abstract xmlns="http://www.w3.org/1999/xhtml">

<p>A promising optoelectronic clock solution with low jitter, high bandwidth and accurate delay for a TIADC is proposed by exploiting optical pulses and tunable optical delay lines. It is feasible to construct the optoelectronic clock system with optical pulse source, dispersive medium, tunable delay line in optical domain and conditioning circuits in electronic domain while photodiodes as the bridge. The testing result of the designed conditioning circuit shows that using electronic method to adjust the signal will induce jitter degradation of the optoelectronic clock system.</p>
</abstract>

A promising optoelectronic clock solution with low jitter, high bandwidth and accurate delay for a TIADC is proposed by exploiting optical pulses and tunable optical delay lines. It is feasible to construct the optoelectronic clock system with optical pulse source, dispersive medium, tunable delay line in optical domain and conditioning circuits in electronic domain while photodiodes as the bridge. The testing result of the designed conditioning circuit shows that using electronic method to adjust the signal will induce jitter degradation of the optoelectronic clock system.

A promising optoelectronic clock solution for time-interleaved ADC

International Journal on Smart Sensing and Intelligent Systems

This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.

{"article-title":"A promising optoelectronic clock solution for time-interleaved ADC"}

A promising optoelectronic clock solution with low jitter, high bandwidth and accurate delay for a TIADC is proposed by exploiting optical pulses and tunable...

A promising optoelectronic clock solution for time-interleaved ADC

Data publikacji: 15 lut 2020

Zakres stron: 1 - 4

DOI: https://doi.org/10.21307/ijssis-2019-060

Słowa kluczowe
analog to digital conversion, time-interleave, sampling jitter

© 2019 Zhongying Wu et al., published by Sciendo.

This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.

A promising optoelectronic clock solution for time-interleaved ADC

Data publikacji: 15 lut 2020

Zakres stron: 1 - 4

DOI: https://doi.org/10.21307/ijssis-2019-060

Słowa kluczoweanalog to digital conversion, time-interleave, sampling jitter

© 2019 Zhongying Wu et al., published by Sciendo.

This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.

Słowa kluczowe
analog to digital conversion, time-interleave, sampling jitter