1. bookVolume 19 (2019): Issue 3 (June 2019)
Journal Details
License
Format
Journal
eISSN
1335-8871
First Published
07 Mar 2008
Publication timeframe
6 times per year
Languages
English
access type Open Access

Digital Signal Processing Algorithm for Measurement of Settling Time of High-Resolution High-Speed DACs

Published Online: 26 Jun 2019
Volume & Issue: Volume 19 (2019) - Issue 3 (June 2019)
Page range: 86 - 92
Received: 23 Jan 2019
Accepted: 30 May 2019
Journal Details
License
Format
Journal
eISSN
1335-8871
First Published
07 Mar 2008
Publication timeframe
6 times per year
Languages
English
Abstract

The paper presents the developed complex Digital Signal Processing algorithm for the reduction of white and 1/f noise and processing of the measurement signals of the Settling Time Measurement of the Digital-to-Analog Converters. The results show that the proposed DSP algorithm ensures 100-fold suppression of the white noise and 1/f noise. It was shown that it is possible to measure settling times of highspeed DACs (up to 16-17 Bits) with readout levels of ± 0.5 LSB while measurement errors do no exceed ± 1.4 ns.

Keywords

[1] D`Antona, G., Ferrero, A. (2006). Digital Signal Processing in Measurements: Theory and Applications. Springer.10.1007/0-387-28666-7Search in Google Scholar

[2] Shen, T., Li, H., Zhang, Q., Li, M. (2014). A novel adaptive frequency estimation algorithm based on interpolation FFT and improved adaptive notch filter. Measurement Science Review, 17 (1), 48-52.Search in Google Scholar

[3] Argez, D. (2002). Weighted multipoint interpolated DFT to improve amplitude estimation of multifrequency signal. IEEE Transactions on Instrumentation and Measurements, 51 (2), 287-292.Search in Google Scholar

[4] Kim, H.T., Jin, K.C., Kim, S.T., Kim, J., Choi, S.-B. (2016). 3D body scanning measurement system associated with RF imaging, zero-padding and parallel processing. Measurement Science Review, 16 (2), 77-86.10.1515/msr-2016-0011Search in Google Scholar

[5] Vaseghi, S.V. (2006). Advance Digital Signal Processing and Noise Reduction, Fourth Edition. Wiley.Search in Google Scholar

[6] Dichev, D., Koev, H., Bakalova, T., Louda, P. (2015). A Kalman filter-based algorithm for measuring. Measurement Science Review, 15 (1), 19-26.10.1515/msr-2015-0004Search in Google Scholar

[7] Angrisani, L., D’Apuzzo, M., D’Arco, M. (2001). A digital signal-processing approach for phase noise measurement. IEEE Transactions on Instrumentation and Measurements, 50 (4), 930-935.10.1109/19.948302Search in Google Scholar

[8] Balestrieri, E. (2006). Some critical notes on DAC time domain specifications. In IEEE Instrumentation and Measurement Technology Conference, Sorrento, Italy. IEEE, 930-935.10.1109/IMTC.2006.328259Search in Google Scholar

[9] Kayabasi, C. (2005). Settling time measurement techniques achieving high precision at high speeds. MS Thesis, Worcester Polytechnic Institute.Search in Google Scholar

[10] Williams, J. (1998). Component and measurement advances ensure 16-bit DAC settling time. EDN, November, 85.Search in Google Scholar

[11] Williams, J. (2010). Precisely measure settling time to 1 ppm. EDN, March 4, 20-24.Search in Google Scholar

[12] Williams, J. (2010). Measuring wide-band amplifier settling time. EDN, August 1.Search in Google Scholar

[13] Kvedaras, R., Kvedaras, V., Ustinavičius, T. (2012). Measurement of settling time of high-speed D/A converters. In 19th International Conference on Mixed Design of Integrated Circuits and Systems (MIXDES 2012), Warsaw, Poland, 507-510.Search in Google Scholar

[14] Kvedaras, V., Kvedaras, R. (2008). The measurements of dynamic parameters of high-speed multi-bit DACs. Electronics and Electrical Engineering, 83 (3), 11-14.Search in Google Scholar

[15] Kvedaras, R., Kvedaras, V., Ustinavičius, T. (2011). Settling time testing of fast DACs. Acta Physica Polonica A, 119 (4), 521-527.10.12693/APhysPolA.119.521Search in Google Scholar

[16] Kvedaras, R., Kvedaras, V., Ustinavičius, T., Kvedarienė, A., Masiulionis, R. (2016). Investigation of digital signal processing of high-speed DACs signals for settling time testing. Universal Journal of Electrical and Electronic Engineering, 4 (2), 67-72.10.13189/ujeee.2016.040204Search in Google Scholar

[17] Kvedaras, R., Kvedaras, V., Ustinavičius, T., Masiulionis, R. (2017). Investigation of complex algorithm of digital signal processing of high-speed DACs signals for settling time testing. In 11th International Conference on Measurement, Smolenice, Slovakia, 71-74.10.23919/MEASUREMENT.2017.7983538Search in Google Scholar

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