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Journals
International Journal on Smart Sensing and Intelligent Systems
Volume 10 (2017): Issue 5 (January 2017)
Open Access
Design of Low Leakage Current Average Power CMOS Current Comparator Using SVL Technique With Pseudo NMOS and Transmission Gate Logics
T.R. Dinesh Kumar
T.R. Dinesh Kumar
,
K. Mohana Sundaram
K. Mohana Sundaram
,
M. Anto Bennet
M. Anto Bennet
,
M. Pooja
M. Pooja
,
A.P. Kokila
A.P. Kokila
and
K. Anusuya
K. Anusuya
| Sep 01, 2017
International Journal on Smart Sensing and Intelligent Systems
Volume 10 (2017): Issue 5 (January 2017)
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Published Online:
Sep 01, 2017
Page range:
344 - 357
Received:
May 27, 2017
Accepted:
Jun 15, 2017
DOI:
https://doi.org/10.21307/ijssis-2017-256
© 2017 T.R. Dinesh Kumar et al., published by Sciendo
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.
T.R. Dinesh Kumar
Faculty of Electronics and Communication Engineering,Vel Tech
Chennai, India
K. Mohana Sundaram
Faculty of Electronics and Communication Engineering,Vel Tech
Chennai, India
Faculty of Electrical and Electronics Engineering,Vel Tech Multitech Dr. Rangarajan Dr. Sakunthala Engineering College
Chennai, India
M. Anto Bennet
Faculty of Electronics and Communication Engineering,Vel Tech
Chennai, India
M. Pooja
UG Student of Electronics and Communication Engineering,Vel Tech
Chennai, India
A.P. Kokila
UG Student of Electronics and Communication Engineering,Vel Tech
Chennai, India
K. Anusuya
UG Student of Electronics and Communication Engineering,Vel Tech
Chennai, India