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A New Model of Dynamic Logic Circuit with NMOS based Keeper

Riazul Islam

Riazul Islam

Department of Electrical and Electronic Engineering, International Islamic University ChittagongChittagong, Bangladesh
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Islam, Riazul
 e 
Satyendra N. Biswas

Satyendra N. Biswas

Department of Electrical and Electronic Engineering, Ahsanullah University of Science and TechnologyDhaka, Bangladesh
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Biswas, Satyendra N.
  
31 dic 2020
A New Model of Dynamic Logic Circuit with NMOS based Keeper's Cover Image
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Pubblicato online: 31 dic 2020
Pagine: 1 - 14
Ricevuto: 14 giu 2020
Accettato: 01 set 2020
DOI: https://doi.org/10.2478/auseme-2020-0001
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© 2020 Riazul Islam et al., published by Sciendo
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 3.0 License.

Dynamic logic circuits are widely popular due to a smaller number of transistors and consume less area. But the time to switch between logics is higher due to higher contention value. A new model of the logic using nMOS based keeper circuit is proposed and the performance is evaluated using Cadence tools. Comparative results demonstrate the suitability and competency of the proposed circuit.

Lingua:
Inglese
Frequenza di pubblicazione:
1 volte all'anno
Argomenti della rivista:
Ingegneria, Elettrotecnica, Tecnologia dell'informazione, Tecnologia energetica, Ingegneria meccanica, Strumenti e metodi, Ingegneria del processo ed industriale
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