Redesign of the AD820 Single-Channel Circuit for the Development of the ARD820 Low-Noise Rail-to-Rail Operational Amplifier

The task of this study was to design and later produce a low-power (single supply 5–30 V, dual supply ± 2.5 V and ± 15 V) rail-to-rail operational amplifier aRD820 with low voltage noise (<4 µV, p-p. 0.1 to 10 Hz), ultralow input bias current (< 15 pA), and low offset voltage (< 500 µV) characteristics. Similar characteristics are presented by Analog Devices chip AD820. Thus, the task of the design team was to adapt the prototype circuity of AD820 to our technological capabilities, modify the circuit, if necessary, and eliminate any deficiency of the prototype. The input stage module got source followers at the input of the operational amplifier. The second stage module was modified to be more symmetric. The output stage module obtained additional resistors and capacitors to achieve frequency compensation. One FET transistor in the current reference module was substituted with other elements. Simplified electric schemes of these modules of AR820 and aRD820 are presented. The performance of modules of modified electric schemes was tested in Simulink software. Simulations of the full electric scheme for aRD820 demonstrated characteristics similar to those of AD820 data tables. Later production of the aRD820 chip and measurements demonstrated that the planned characteristics of the operational amplifier were met.