Design of wide-band high-linearity transimpedance amplifier using standard CMOS technology

In this paper, the design methodology of a high-linearity wide-band transimpedance amplifier (TIA) for cable television (CATV) application is addressed. A simple four-stage topology is proposed to maintain a well-balanced linearity over a wide operating band. The regulated cascode (RGC) input stage is used to match an input impedance of 75 Ω, followed by a gain stage with enhanced bandwidth. The high-linearity output stage is able to drive the 75 Ω load directly with high output swing under a high supply voltage. The prototype is implemented with a standard 0.11μm CMOS process while occupying the silicon area of 0.034 mm². The measurement results for the prototype show a peak gain of 76.6 dBΩ over a 3-dB bandwidth of 1.1 GHz with a considerably small gain ripple and an OIP₃ of 20.4 dBm. The whole test chip consumes 447 mW DC power and the measured average input-referred noise current spectral density is 7.9 pA Hz^−1/2 up to 1 GHz.