Note on Modular Reduction in Extended Finite Fields and Polynomial Rings for Simple Hardware
17 mars 2016
À propos de cet article
Publié en ligne: 17 mars 2016
Pages: 56 - 60
Reçu: 08 oct. 2015
DOI: https://doi.org/10.1515/jee-2016-0008
Mots clés
© 2016 Faculty of Electrical Engineering and Information Technology, Slovak University of Technology
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 3.0 License.
Modular reduction in extended finite fields and polynomial rings is presented, which once implemented works for any random reduction polynomial without changes of the hardware. It is possible to reduce polynomials of whatever degree. Based on the principal defined, two example RTL architectures are designed, and some useful features are noted furthermore. The first architecture is sequential and reduce whatever degree polynomials, taking 2 cycles per term. The second one is Parallel and designed for reduction of polynomials of 2(