<abstract xmlns="http://www.w3.org/1999/xhtml"><p>In modern computing technique, calculation of leading zeros in a data represented as strings of digits is used very often. Those techniques require high speed of the circuit, as well as its fast design. In this paper we propose a design of such a counter, which is applicable to data length of <italic>w</italic> = 4<italic>j</italic> bits, for 4 &lt; <italic>j</italic> ≤ 8. With this solution it is also possible to process longer data, since the suggested technique offers a good modularity. This is very important, considering the current technology scaling trends. In this paper, a delay behavior of the proposed circuit has also been investigated using equations and VHDL simulation based worst-case delay estimation method. The results show a significant improvement of the circuit speed, compared to the known solutions.</p></abstract>

In modern computing technique, calculation of leading zeros in a data represented as strings of digits is used very often. Those techniques require high speed of the circuit, as well as its fast design. In this paper we propose a design of such a counter, which is applicable to data length of w = 4j bits, for 4 < j ≤ 8. With this solution it is also possible to process longer data, since the suggested technique offers a good modularity. This is very important, considering the current technology scaling trends. In this paper, a delay behavior of the proposed circuit has also been investigated using equations and VHDL simulation based worst-case delay estimation method. The results show a significant improvement of the circuit speed, compared to the known solutions.

Modular Design Of Fast Leading Zeros Counting Circuit

Faculty of Electronic Engineering, Aleksandra Medvedeva 14, 18000 Nis, Serbia

Journal of Electrical Engineering

This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 3.0 License.

{"article-title":"Modular Design Of Fast Leading Zeros Counting Circuit"}

In modern computing technique, calculation of leading zeros in a data represented as strings of digits is used very often. Those techniques require high speed...

Modular Design Of Fast Leading Zeros Counting Circuit

Online veröffentlicht: 05. Dez. 2015

Seitenbereich: 329 - 333

Eingereicht: 03. Juli 2014

DOI: https://doi.org/10.2478/jee-2015-0054

Schlüsselwörter
leading zeros count, all zeros detection, modular design

© 2015 Faculty of Electrical Engineering and Information Technology, Slovak University of Technology

This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 3.0 License.

Modular Design Of Fast Leading Zeros Counting Circuit

Online veröffentlicht: 05. Dez. 2015

Seitenbereich: 329 - 333

Eingereicht: 03. Juli 2014

DOI: https://doi.org/10.2478/jee-2015-0054

Schlüsselwörterleading zeros count, all zeros detection, modular design

© 2015 Faculty of Electrical Engineering and Information Technology, Slovak University of Technology

This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 3.0 License.

Schlüsselwörter
leading zeros count, all zeros detection, modular design