<abstract xmlns="http://www.w3.org/1999/xhtml"><p>The paper presents fully digitized approach for band-pass discrete coded radar signals. The emphasis is to use one generalized reconfigurable compressor for several different types of signals and different types of receivers. It fits for direct radio frequency receiver (RF) as well as for intermediate frequency (IF) receiver. The system implementation on field programmable gate area (FPGA) let us eliminate special chips previously needed. From the experimental results it is known that this approach appears to work well for matched and mismatched pulse compression and it outstands when timebandwidth product (TB) is of order 1000. A precision of 14 bits has been considered in the input signal and 16 bits in the filter coefficients. It gives the dynamic range of 78 dB and the quantification error less than 0.012%.</p></abstract>

The paper presents fully digitized approach for band-pass discrete coded radar signals. The emphasis is to use one generalized reconfigurable compressor for several different types of signals and different types of receivers. It fits for direct radio frequency receiver (RF) as well as for intermediate frequency (IF) receiver. The system implementation on field programmable gate area (FPGA) let us eliminate special chips previously needed. From the experimental results it is known that this approach appears to work well for matched and mismatched pulse compression and it outstands when timebandwidth product (TB) is of order 1000. A precision of 14 bits has been considered in the input signal and 16 bits in the filter coefficients. It gives the dynamic range of 78 dB and the quantification error less than 0.012%.

Design and EPGA Implementation of Digital Pulse Compression for Band–Pass Radar Signals

Department of electronic systems, University of defence, Belgrade, Serbia

RT-RK Computer based systems, Novi Sad, Serbia

Journal of Electrical Engineering

The paper presents fully digitized approach for band-pass discrete coded radar signals. The emphasis is to use one generalized reconfigurable compressor for...

Design and EPGA Implementation of Digital Pulse Compression for Band–Pass Radar Signals

Online veröffentlicht: 08. Juni 2013

Seitenbereich: 191 - 195

DOI: https://doi.org/10.2478/jee-2013-0028

Schlüsselwörter
digital down converter, digital pulse compression, FPGA mismatched filter, sidelobes reduction

This content is open access.

Design and EPGA Implementation of Digital Pulse Compression for Band–Pass Radar Signals

Online veröffentlicht: 08. Juni 2013

Seitenbereich: 191 - 195

DOI: https://doi.org/10.2478/jee-2013-0028

Schlüsselwörterdigital down converter, digital pulse compression, FPGA mismatched filter, sidelobes reduction

This content is open access.

Schlüsselwörter
digital down converter, digital pulse compression, FPGA mismatched filter, sidelobes reduction