Signal Sensing By The Architecture Of Embedded I/O Pad Circuits
Online veröffentlicht: 11. März 2014
Seitenbereich: 196 - 213
Eingereicht: 12. Nov. 2013
Akzeptiert: 25. Feb. 2014
DOI: https://doi.org/10.21307/ijssis-2017-652
Schlüsselwörter
© 2014 Shen-Li Chen et al., published by Sciendo
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.
In this study, the detecting structures in an embedded CUP wafer, which are called sensors, are investigated through a contactless sensing analysis. These novel sensing structures, which were designed using the ADS 2009 platform and the design rules for the TSMC 0.18-μm CMOS process, were placed under bonding pads. However, signals would still pass through these I/O sensing structures (i.e., ESD devices or circuits) and become coupled up to the pads of the top-layer metal as square, sinusoidal, or ESD pulse waveforms are injected. Through the resulting sensing relationship, we could then judge whether or not the bottom circuit is a good candidate for EMI consideration. Eventually, it was found that during an ESD occurred situation, a strong signal coupling can be sensed by the ESD protection circuits, especially by gate-coupled ESD protection circuitry.