<abstract xmlns="http://www.w3.org/1999/xhtml">
<p>In this paper, a broadband(12-18G) low-noise amplifier (LNA) using 65-nm CMOS technology for satellite communication is presented. This LNA was designed in a cascode common source with inductive degeneration topology. In addition, the bulk isolation technique is employed to make the proposed LNA have a higher gain. Furthermore, a two-stage cascaded configuration combined with inductive parallel peaking technology is utilized to make the LNA achieve a wide operating band. For validation, we design this LNA in a 65nm CMOS technology. The simulated results show that S21 of 17.7dB <italic>± </italic>0.5dB, the input/output return loss of -10dB to -33dB and -12dB to -23dB, respectively. It offers the minimum noise figure (NF) performance of 3.33dB, reverse isolation(S12) better than 60dB, and third-order input point (IIP3) of -22.8 dBm obtained over the band of interest. Excluding the output buffer stage, the LNA is consuming 5.1 mW at a supply voltage of 0.8V and its layout area occupies 0.205 mm<sup>2</sup>.</p>
</abstract>

In this paper, a broadband(12-18G) low-noise amplifier (LNA) using 65-nm CMOS technology for satellite communication is presented. This LNA was designed in a cascode common source with inductive degeneration topology. In addition, the bulk isolation technique is employed to make the proposed LNA have a higher gain. Furthermore, a two-stage cascaded configuration combined with inductive parallel peaking technology is utilized to make the LNA achieve a wide operating band. For validation, we design this LNA in a 65nm CMOS technology. The simulated results show that S21 of 17.7dB ± 0.5dB, the input/output return loss of -10dB to -33dB and -12dB to -23dB, respectively. It offers the minimum noise figure (NF) performance of 3.33dB, reverse isolation(S12) better than 60dB, and third-order input point (IIP3) of -22.8 dBm obtained over the band of interest. Excluding the output buffer stage, the LNA is consuming 5.1 mW at a supply voltage of 0.8V and its layout area occupies 0.205 mm2.

A Ku band low-voltage and low-power CMOS low-noise amplifier with bulk isolation techniques

School of Integrated Circuits, Guangdong University of Technology

Journal of Electrical Engineering

This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.

In this paper, a broadband(12-18G) low-noise amplifier (LNA) using 65-nm CMOS technology for satellite communication is presented. This LNA was designed in a...

A Ku band low-voltage and low-power CMOS low-noise amplifier with bulk isolation techniques

Published Online: Apr 04, 2024

Page range: 102 - 112

Received: Jan 15, 2024

DOI: https://doi.org/10.2478/jee-2024-0014

Keywords
broadband, low power, low-noise amplifier (LNA), bulk isolation

© 2024 Zifeng Guo et al., published by Sciendo

This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.

A Ku band low-voltage and low-power CMOS low-noise amplifier with bulk isolation techniques

Published Online: Apr 04, 2024

Page range: 102 - 112

Received: Jan 15, 2024

DOI: https://doi.org/10.2478/jee-2024-0014

Keywordsbroadband, low power, low-noise amplifier (LNA), bulk isolation

© 2024 Zifeng Guo et al., published by Sciendo

This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.

Keywords
broadband, low power, low-noise amplifier (LNA), bulk isolation