Magazine et Edition

Volume 14 (2021): Edition 2 (December 2021)

Volume 14 (2021): Edition 1 (September 2021)

Volume 13 (2020): Edition 2 (December 2020)

Volume 13 (2020): Edition 1 (September 2020)

Volume 12 (2019): Edition 2 (December 2019)

Volume 12 (2019): Edition 1 (September 2019)

Volume 11 (2018): Edition 2 (December 2018)

Volume 11 (2018): Edition 1 (September 2018)

Détails du magazine
Format
Magazine
eISSN
2343-8908
Première publication
30 Sep 2018
Période de publication
2 fois par an
Langues
Anglais

Chercher

Volume 13 (2020): Edition 2 (December 2020)

Détails du magazine
Format
Magazine
eISSN
2343-8908
Première publication
30 Sep 2018
Période de publication
2 fois par an
Langues
Anglais

Chercher

5 Articles
Accès libre

Using Pathological Elements in Analog Circuit Analysis and Simulation

Publié en ligne: 31 Dec 2020
Pages: 1 - 6

Résumé

Abstract

This paper is focused on some kind of mystery circuit nullator, nullor, current mirror, and voltage mirror, all of them known as pathological elements. These pathological elements can be used to perform circuit modelling, symbolic circuit analysis, circuit synthesis, circuit design and to develop applications that involve modern active devices. It is described a new modeling of nullor-based active devices from the circuit abstraction level. In this paper it is presented the way all types of equations which describe the circuit containing nullors can be directly formulated from the diagrams of these circuits if we took into account that a nullator is an over-determined two-port circuit element (zero voltage, zero current) and the norator is an undetermined two-port circuit element (any voltage and any current). To simulate the nullors with ideal voltage controlled voltage sources, ec = Ac_c uc, with the control gate an ideal independent current source, jC = 0.0 A and with the amplification (transfer) factor Ac_C very big (theoretically ∞), the analog circuits with nullors can be analyzed by using any of the existing simulation software. By this way, it was possible the elaboration of efficient algorithms for an automatic formulation of Kirchhoff’s equations, of loop equations, of modified nodal equations and of state equations for circuits with pathological elements. These procedures can be easily implemented in dedicated programs for the simulations of the complex analog circuits with pathological elements. The example presented in this paper validates the presented models for nullors.

Mots clés

  • component
  • formatting
  • style
  • styling
  • insert
Accès libre

A Survey about Intelligent Solutions for Autonomous Vehicles based on FPGA

Publié en ligne: 31 Dec 2020
Pages: 7 - 11

Résumé

Abstract

Safe driving and reducing the number of accidents victims have been the main motivations for researchers and automotive companies for decades. Today, humanity is very close to make the old dream of fully autonomous vehicles a reality, thanks to the rapid spread of AI (artificial intelligence) and the evolution of semiconductor technologies. But the real problem here is the increasing demand for computational power and that of course will increase power requirements, hence it will not be suitable for autonomous driving applications. GPU is not suitable for solving this problem due to its power consumption as well as heat generation. On the other hand, CPU also does not satisfy the performance requirements. For the above condition, FPGA (Field Programmable Gate Array) has drawn attention as a hardware accelerator since it features high performance with low power consumption. This paper reviews the common solutions involving artificial intelligence implemented on FPGA for autonomous vehicle applications. Research, development, and current trends related to the topic are emphasized.

Mots clés

  • FPGA
  • AI
  • Autonomous Vehicles
  • HW Acceleration
  • Coprocessing
Accès libre

Pragmatic Implementation of the Front-End of an N-bit/V ADC based on FPGA and FPAA

Publié en ligne: 31 Dec 2020
Pages: 12 - 15

Résumé

Abstract

Reconfigurability has made it possible, among other benefits, to replace traditional discrete components with chips, whose internal components can be programmed in this case FPAAs (Field Programmable Analog Arrays). This paper presents a design and implementation of FPAA of the analog front end dedicated to a new ADC architecture called “N-bit/V”. After validation of the algorithm in simulation, the experimentation results show that the obtained reconfigurable circuit can replace the traditional discrete components-based circuits.

Mots clés

  • ADC
  • FPAA
  • FPGA
  • Rapid Prototyping
Accès libre

Increasing fault tolerance in service-level agreement constrained context-aware data networks

Publié en ligne: 31 Dec 2020
Pages: 16 - 21

Résumé

Abstract

Attribute study and analysis of fault tolerant data networks. This work is aimed at introducing SLA constrain into fault tolerance and thus increasing overall network availability. Proposed model will evaluate given constraints and select best path that fits requirements. Fault tolerance is increased by adding multiple constraints and thus reducing available paths to best fitting ones.

Mots clés

  • SLA
  • DMVPN
  • fault tolerance
  • computer networks
Accès libre

Theoretical and experimental aspects of the controlled movement of solenoid actuators by means of the voltage static converter with logic gates

Publié en ligne: 31 Dec 2020
Pages: 22 - 29

Résumé

Abstract

The purpose of the scientific research in this paper is to control the movement of electromechanical actuators, through a new voltage convertor. The optimization of the system consists in finding new solutions to control the movement of electromechanical actuators in the gas valve, used in thermal power plants, which can be operated by static converters - with logic gates.

Mots clés

  • actuators
  • control
  • converters
  • electromechanical
  • logic gates
  • motion
  • Proteus
5 Articles
Accès libre

Using Pathological Elements in Analog Circuit Analysis and Simulation

Publié en ligne: 31 Dec 2020
Pages: 1 - 6

Résumé

Abstract

This paper is focused on some kind of mystery circuit nullator, nullor, current mirror, and voltage mirror, all of them known as pathological elements. These pathological elements can be used to perform circuit modelling, symbolic circuit analysis, circuit synthesis, circuit design and to develop applications that involve modern active devices. It is described a new modeling of nullor-based active devices from the circuit abstraction level. In this paper it is presented the way all types of equations which describe the circuit containing nullors can be directly formulated from the diagrams of these circuits if we took into account that a nullator is an over-determined two-port circuit element (zero voltage, zero current) and the norator is an undetermined two-port circuit element (any voltage and any current). To simulate the nullors with ideal voltage controlled voltage sources, ec = Ac_c uc, with the control gate an ideal independent current source, jC = 0.0 A and with the amplification (transfer) factor Ac_C very big (theoretically ∞), the analog circuits with nullors can be analyzed by using any of the existing simulation software. By this way, it was possible the elaboration of efficient algorithms for an automatic formulation of Kirchhoff’s equations, of loop equations, of modified nodal equations and of state equations for circuits with pathological elements. These procedures can be easily implemented in dedicated programs for the simulations of the complex analog circuits with pathological elements. The example presented in this paper validates the presented models for nullors.

Mots clés

  • component
  • formatting
  • style
  • styling
  • insert
Accès libre

A Survey about Intelligent Solutions for Autonomous Vehicles based on FPGA

Publié en ligne: 31 Dec 2020
Pages: 7 - 11

Résumé

Abstract

Safe driving and reducing the number of accidents victims have been the main motivations for researchers and automotive companies for decades. Today, humanity is very close to make the old dream of fully autonomous vehicles a reality, thanks to the rapid spread of AI (artificial intelligence) and the evolution of semiconductor technologies. But the real problem here is the increasing demand for computational power and that of course will increase power requirements, hence it will not be suitable for autonomous driving applications. GPU is not suitable for solving this problem due to its power consumption as well as heat generation. On the other hand, CPU also does not satisfy the performance requirements. For the above condition, FPGA (Field Programmable Gate Array) has drawn attention as a hardware accelerator since it features high performance with low power consumption. This paper reviews the common solutions involving artificial intelligence implemented on FPGA for autonomous vehicle applications. Research, development, and current trends related to the topic are emphasized.

Mots clés

  • FPGA
  • AI
  • Autonomous Vehicles
  • HW Acceleration
  • Coprocessing
Accès libre

Pragmatic Implementation of the Front-End of an N-bit/V ADC based on FPGA and FPAA

Publié en ligne: 31 Dec 2020
Pages: 12 - 15

Résumé

Abstract

Reconfigurability has made it possible, among other benefits, to replace traditional discrete components with chips, whose internal components can be programmed in this case FPAAs (Field Programmable Analog Arrays). This paper presents a design and implementation of FPAA of the analog front end dedicated to a new ADC architecture called “N-bit/V”. After validation of the algorithm in simulation, the experimentation results show that the obtained reconfigurable circuit can replace the traditional discrete components-based circuits.

Mots clés

  • ADC
  • FPAA
  • FPGA
  • Rapid Prototyping
Accès libre

Increasing fault tolerance in service-level agreement constrained context-aware data networks

Publié en ligne: 31 Dec 2020
Pages: 16 - 21

Résumé

Abstract

Attribute study and analysis of fault tolerant data networks. This work is aimed at introducing SLA constrain into fault tolerance and thus increasing overall network availability. Proposed model will evaluate given constraints and select best path that fits requirements. Fault tolerance is increased by adding multiple constraints and thus reducing available paths to best fitting ones.

Mots clés

  • SLA
  • DMVPN
  • fault tolerance
  • computer networks
Accès libre

Theoretical and experimental aspects of the controlled movement of solenoid actuators by means of the voltage static converter with logic gates

Publié en ligne: 31 Dec 2020
Pages: 22 - 29

Résumé

Abstract

The purpose of the scientific research in this paper is to control the movement of electromechanical actuators, through a new voltage convertor. The optimization of the system consists in finding new solutions to control the movement of electromechanical actuators in the gas valve, used in thermal power plants, which can be operated by static converters - with logic gates.

Mots clés

  • actuators
  • control
  • converters
  • electromechanical
  • logic gates
  • motion
  • Proteus

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