1. bookVolume 12 (2020): Issue 1 (December 2020)
Journal Details
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Journal
First Published
15 Dec 2017
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1 time per year
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English
access type Open Access

A New Model of Dynamic Logic Circuit with NMOS based Keeper

Published Online: 31 Dec 2020
Page range: 1 - 14
Received: 14 Jun 2020
Accepted: 01 Sep 2020
Journal Details
License
Format
Journal
First Published
15 Dec 2017
Publication timeframe
1 time per year
Languages
English

Dynamic logic circuits are widely popular due to a smaller number of transistors and consume less area. But the time to switch between logics is higher due to higher contention value. A new model of the logic using nMOS based keeper circuit is proposed and the performance is evaluated using Cadence tools. Comparative results demonstrate the suitability and competency of the proposed circuit.

Keywords

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